SPI
1. Overview
BK7258 provides two SPI controllers (three pin groups for SPI0, one for SPI1). Supports master/slave, 3-wire or 4-wire full-duplex transfers. Typical peripherals include external flash, LCD, and sensors.
See: SPI Driver Guide
2. Code Path
CLI:
components/bk_cli/cli_spi.cDriver:
middleware/driver/spi/spi_driver.candmiddleware/driver/spi/spi_flash.c
3. Configuration
Macros for enabling SPI, DMA, statistics dump, TX FIFO ready interrupt, low-power votes, and SPI flash support (CONFIG_SPI etc.).
4. Pins
SPI0 pin groups (choose one):
Function |
Group 0 |
Group 1 |
Group 2 |
|---|---|---|---|
CLK CS MOSI MISO |
GPIO14 GPIO15 GPIO16 GPIO17 |
GPIO44 GPIO45 GPIO46 GPIO47 |
GPIO33 GPIO34 GPIO35 GPIO36 |
SPI1 pins (group 0): CLK GPIO2, CS GPIO3, MOSI GPIO4, MISO GPIO5.
Default settings in hal/spi_ll.h select GPIO14–17 for SPI0; alternate pin sets are commented.
5. CLI Commands
Command |
Param |
Description |
|---|---|---|
|
|
Initialize or release SPI resources |
|
|
Configure SPI working parameters |
|
|
Adjust parameters after initialization |
|
|
Transfer data through SPI |
Supported baud rates (from source clock divisors) include 26 MHz, 13 MHz, 6.5 MHz, 5.2 MHz, 3.25 MHz, etc.
Mode ↔ CPOL/CPHA mapping:
Mode |
CPOL |
CPHA |
|---|---|---|
0 1 2 3 |
0 0 1 1 |
0 1 0 1 |
6. Demo
Wire two BK7258 boards via CON4 (share ground). Example pin mapping (SCK P44, CS P45, MOSI P46, MISO P47).
Initialize driver on each board (add
cpu1prefix for AP commands).Master:
spi_driver initthenspi 0 init master 8 1 1 4 10000000 MSB 1Slave:
spi_driver initthenspi 0 init slave 8 1 1 4 10000000 MSB 1
Start transfers:
Slave waits:
spi 0 read 1024Master writes:
spi 0 write 1024
Slave output logs show received buffer contents (0x00 … 0xFF).